{"id":3652,"date":"2026-08-03T09:41:49","date_gmt":"2026-08-03T09:41:49","guid":{"rendered":"https:\/\/www.megabytecircuit.com\/blog\/?p=3652"},"modified":"2026-08-24T11:15:03","modified_gmt":"2026-08-24T11:15:03","slug":"export-kicad-gerber-drill-files-guide","status":"publish","type":"post","link":"https:\/\/www.megabytecircuit.com\/blog\/export-kicad-gerber-drill-files-guide\/","title":{"rendered":"How to Export Manufacturing-Ready Gerber & Drill Files from KiCad"},"content":{"rendered":"\t\t
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How to Export Manufacturing-Ready Gerber & Drill Files from KiCad<\/h1>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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In my 20+ years of working on the factory floor at Megabyte Circuit Systems, I\u2019ve seen hundreds of brilliant hardware engineers and IoT startups hit a frustrating roadblock right at the finish line. You\u2019ve just finished routing a beautiful board in KiCad. The Design Rules Check (DRC) is perfectly clean, the 3D viewer looks incredible, and you are finally ready to hold the physical board in your hands.<\/span><\/p>

But here is where I see nearly 30% of engineers stumble: translating that perfect KiCad design into manufacturing-ready Gerber and drill files.<\/span><\/p>

Think of Gerber files as the universal language of PCB manufacturing. No matter how great your design is on screen, if your exported files are missing a board outline or have misaligned drill hits, your project is going to face immediate delays. Whether you’re a student building a simple project or a senior engineer pushing industrial boundaries, this guide is going to walk you through exactly how to export your files right the first time. As a trusted consultant, I\u2019m going to share the exact settings we prefer at our factory so your board moves straight to the production line without a single hitch.<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Why Accurate Gerber & Drill Files Matter<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Gerber files act as the universal language between PCB design software like KiCad and the manufacturer’s Computer-Aided Manufacturing (CAM) systems. Generating accurate layer plots and Excellon drill files ensures zero production holds, precise etching, and perfect layer alignment, regardless of whether it’s a simple single-sided board or a complex multilayer design.<\/b><\/p>

When you hit “export,” you aren’t just saving a picture; you are generating the exact toolpaths for our photoplotters, CNC drills, and automated optical inspection (AOI) machines. If you are just prototyping a basic<\/span> Single Layer PCB<\/span><\/a> for a quick proof-of-concept, the manufacturing tolerances might be quite forgiving. But the moment you step into high-speed digital designs requiring tight impedance control on a<\/span> Multilayer PCB<\/span><\/a>, every single micron in your Gerber data matters.<\/span><\/p>

If your files are correct, we can process your order immediately. If they aren’t, it triggers an engineering hold, a string of emails, and days added to your lead time. Let’s make sure that doesn’t happen to your project.<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Step 1: The Essential Pre-Export DFM Check<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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Before exporting from KiCad, always run a final Design Rules Check (DRC) to catch trace clearance violations, unrouted nets, or overlapping courtyards. Fixing Design for Manufacturing (DFM) issues pre-export prevents back-and-forth emails with your fabricator and guarantees your board meets standard manufacturing tolerances.<\/b><\/p>

One thing I always tell my clients is to never export without running a final DRC. It\u2019s the easiest way to catch those small, easily overlooked mistakes. Go to the top toolbar in KiCad\u2019s PCB Editor and click the <\/span>DRC icon<\/b> (the ladybug). Hit “Run DRC.”<\/span><\/p>

You need to ensure that your trace widths and clearances match your manufacturer’s capabilities. For example, if you are calculating trace impedance for high-speed signals, you might be using standard microstrip formulas to dictate your constraints:<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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\n \n Z<\/mi>0<\/mn><\/msub>\n =<\/mo>\n \n 87<\/mn>\n \n ε<\/mi>r<\/mi><\/msub>\n +<\/mo>\n 1.41<\/mn>\n <\/msqrt>\n <\/mfrac>\n ln<\/mi>\n \n (<\/mo>\n \n 5.98<\/mn>h<\/mi><\/mrow>\n 0.8<\/mn>w<\/mi>+<\/mo>t<\/mi><\/mrow>\n <\/mfrac>\n )<\/mo>\n <\/mrow>\n <\/math>\n<\/div>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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While the math gives you your exact trace width ($w$) and dielectric height ($h$), you must ensure those resulting numbers don’t violate our factory’s minimum spacing rules (typically 4mil or 5mil for advanced boards). Resolve any unrouted nets, ensure your silkscreen text doesn’t overlap exposed copper soldering pads, and verify your copper pours have completely filled before moving to the next step.<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Step 2: Plotting Your Gerber Layers in KiCad<\/h2>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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To export Gerber files in KiCad, navigate to File > Fabrication Outputs > Gerbers. Ensure you select the correct copper, solder mask, silkscreen, and Edge.Cuts layers, check the “Use Protel filename extensions” option, and set the coordinate format to 4.6 mm for maximum precision.<\/b><\/p>

Alright, let\u2019s get down to the actual export. In your KiCad PCB Editor, navigate to <\/span>File > Fabrication Outputs > Gerbers (.gbr)<\/b>. This opens the main Plot dialog box.<\/span><\/p>

First, select your output directory. I highly recommend creating a dedicated folder named <\/span>Gerbers_ProjectName_v1.0<\/span> so you don’t accidentally mix up old and new design iterations.<\/span><\/p>

Next, you need to select the right layers. Here is the exact checklist I want you to follow for a standard board:<\/span><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Essential KiCad Layers for Standard PCBs<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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KiCad Layer Name<\/b><\/p><\/td>

Protel Extension<\/b><\/p><\/td>

Purpose in Manufacturing<\/b><\/p><\/td><\/tr>

F.Cu<\/b><\/p><\/td>

.GTL<\/span><\/p><\/td>

Top copper layer (traces, pads, planes)<\/span><\/p><\/td><\/tr>

B.Cu<\/b><\/p><\/td>

.GBL<\/span><\/p><\/td>

Bottom copper layer<\/span><\/p><\/td><\/tr>

F.Mask<\/b><\/p><\/td>

.GTS<\/span><\/p><\/td>

Top Solder Mask (where the green\/colored ink goes)<\/span><\/p><\/td><\/tr>

B.Mask<\/b><\/p><\/td>

.GBS<\/span><\/p><\/td>

Bottom Solder Mask<\/span><\/p><\/td><\/tr>

F.Silkscreen<\/b><\/p><\/td>

.GTO<\/span><\/p><\/td>

Top Silkscreen (white text, logos, component outlines)<\/span><\/p><\/td><\/tr>

B.Silkscreen<\/b><\/p><\/td>

.GBO<\/span><\/p><\/td>

Bottom Silkscreen<\/span><\/p><\/td><\/tr>

Edge.Cuts<\/b><\/p><\/td>

.GKO<\/span> or <\/span>.GM1<\/span><\/p><\/td>

The physical board outline and internal cutouts<\/span><\/p><\/td><\/tr><\/tbody><\/table>

Note: If your design has inner copper layers (e.g., In1.Cu, In2.Cu), make sure those boxes are checked as well.<\/span><\/i><\/p>\t\t\t\t\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t

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Vital Plot Settings<\/h3>\t\t\t\t<\/div>\n\t\t\t\t<\/div>\n\t\t\t\t
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On the right side of the Plot window, configure these exact settings to ensure compatibility with modern CAM software:<\/span><\/p>